1. Field of the Invention
The present invention relates to semiconductor devices and, more particularly, to a power supply connection structure for supplying a power to a semiconductor device such as a large-scale integrated circuit (LSI), which is mounted and packaged on a circuit board.
2. Description of the Related Art
In large-scale integrated circuit (LSI) such as a CPU or MPU, high integration (high-densification) of a circuit is increasingly apt to progress. With such a high-integration, a power consumption of one LSI has been increased, and at present an LSI having a power consumption of 30 W to 100 W has been developed.
Additionally, a number of signals supplied to an LSI also increases with the high-integration of a circuit, and a number of terminals for signals and a number of terminals for power supply and grounding must be increased. In the present LSI, a ball grid array (BGA) type is mainly used in which solder balls as external connection terminals are provided in a grid-like arrangement on a back surface of a substrate on which a semiconductor chip.
If a number of terminals of an LSI package is increased, a wiring pattern formed in a package substrate must be minute. Therefore, an allowable value of a current, which can be supplied to the wiring within the package substrate, is decreased. On the other hand, a power supply voltage of an LSI has become lower, and it is being shifted to a power supply voltage of 5 V to 1 V. If it is the same power consumption, a current is increased when a power supply voltage is decreased. Therefore, it is necessary to supply a larger current to power source wiring in the package substrate than signal wiring.
FIG. 1 is a cross-sectional view of a substrate unit showing an electric power supply structure to a conventional LSI package. In FIG. 1, an LSI package 1 is mounted on a substrate 2 such as a motherboard or a daughter-board. Solder balls 3 as external connection terminals of the LSI package 1 are connected to electrode pads 4 on the substrate 2.
The LSI package 1 comprises a semiconductor chip (LSI) 5 and a package substrate 6. The LSI 5 is mounted to the package substrate 6, and signals and electric power are supplied to the LSI 5 through the wiring in the package substrate 6. A DC-DC converter 7 is mounted in the substrate 2 so as to control a power supply voltage supplied to the LSI package 1. The DC-DC converter 7 lowers the voltage supplied from a power source line 8A in the substrate 2 to the power supply voltage for the LSI package 1. For example, a voltage of 48 V or 24 V is supplied to the power source line 8A in the substrate 2, lowered to 1.8 V or 1 V by the DC-DC converter 7, and is supplied to a power supply line 8B. The power supply line 8B is connected to the solder ball 3 of the LSI package 1 through the electrode pad 4, and the power supply voltage of 1.8 V or 1 V is supplied to the package substrate 6. Similarly, a grounding line 9A is connected to the package substrate 6 through the DC-DC converter 7, a grounding line 9B, an electrode pad 4, and the solder ball 3.
Generally, in the package substrate 6, a power supply layer 10 and a grounding layer 11 are provided to extend in the form of plane. The power supply to the LSI package 1 is achieved by supplying a power from the substrate 2 to the power supply layer 10 first, and a power is supplied from the power supply layer 10 to each power supply terminal of the LSI package. There is no problem in the power supply from the power supply layer 10 to the semiconductor chip (LSI) 5 even if the cross-sectional area of the power supply path is comparatively small since a value of the current to be supplied is comparatively small. On the other hand, it is necessary to supply a large current to be consumed by the entire LSI 5 to the power supply path from the solder ball 3 to the power source layer 10, and, thus, a large cross-sectional area must be acquired so as to maintain a large allowable current value.
FIG. 2 is an enlarged cross-sectional view of a part of a build-up substrate, which is an example of the package substrate 6 shown in FIG. 1.
Generally, a build-up substrate is formed by providing the power source layer 10 on one side of a core substrate 12 as a center and providing a grounding layer on the other side of the core substrate 12. Then, signal wiring is formed on both sides of the core substrate 12, connection electrode pads 13 are provided on one side, and electrode pads for forming the solder balls 3 are provided on the other side.
On the assumption that the solder balls 3 shown in FIG. 2 correspond to the power supply terminals, a large current flows from the solder balls 3 to the power supply layer 10 in FIG. 2. Here, a part between the solder balls 3 and the power supply layer 10 contains vias 15 which penetrate through the layers of the build-up substrate.
A diameter of a via formed in a built-up substrate is in a range of about 50 μm to 100 μm, and the diameter of the via must be reduced if a number of terminals is increased. Thus, a permissible current for one via is limited to about 500 mA. That is, for example, in order to supply an electric power to an LSI of power consumption of 100 W, 200 vias having a permissible current of 500 mA are needed on the assumption that 1 V is applied to each via. Since one via is provided to one terminal (solder ball 3), it is required to provide 200 terminals (solder balls 3) for power supply.
Therefore, if the number of power supply terminals is increase without decreasing the number of signal terminals, the number of terminals in the entire package substrate. Thus, there is a problem in that a size of the package substrate must be increased.
Moreover, if the power supply voltage of an LSI becomes low, a noise tends easily enter the power source line, and it is desired to reduce a length of the power source line.